Our team currently consists of one PhD student and three Post-doctoral researchers. Their short biographies and research interests are listed below:
Yi-Chung Chen received the B.S. degree in Electrical Engineering-nanotechnology from Yuan Ze University, Taoyuan, Taiwan, in 2006, the M.S. degree in Electrical and Computer Engineering from Polytechnic School of Engineering, New York University in 2011, and the Ph.D. degree in Electrical and Computer Engineering from Swanson school of Engineering, University of Pittsburgh in 2014. Since Aug. 2015, he is a research associate with APT group, school of computer science, University of Manchester. His research interests include architecture/circuit/device co-design for emerging nonvolatile memory system, CAD tool development, FPGA, embedded system, and reconfigurable computing. More info about my research, you can find here.
Ioannis Papistas is a second year PhD student within the APT group. He received his B.S. and M.Sc. degrees in Electrical and Computer Engineering from the Aristotle University of Thessaloniki in 2014. From 9/2013 to 3/2014, he was an intern at IMEC, Leuven, Belgium where he worked on models of decoupling capacitor geometries for interposer technologies. His research interests are mainly IC design, on chip interconnects, and 3-D integration. He holds a studentship from the School of Computer Science.
Scott Ladenheim is a post-doctoral research associate. He received his B.S. at Syracuse University in Mathematics in 2009. He received both his M.A. (2013) and PhD (2015) degrees in Mathematics from Temple University. His research background is in Applied Mathematics and Scientific Computing. His current research interests are in the development of fast solution methods for determining thermal profiles of 3-D integrated circuits.
Harry (Charalampos) Kalargaris graduated with a PhD degree in September 2017. He is now with Qualcomm, Cambridge as a Senior Engineer for Chip Implementation. During his PhD, Harry developed a design flow for digital multi-tier ICs and a design methodology for voltage scaling in 3-D ICs among other problems related to the design of low-power circuits for inter-block and inter-chip communications.
Przemyslaw Mroszczyk received his five-year Masters (mgr inz) degree in electronic engineering from the University of Science and Technology (former AGH), Kraków, Poland, in 2010, and the Ph.D. degree in Electrical and Electronics Engineering from the University of Manchester, U.K., in 2014. In 2014/2015 he worked as Microelectronics Designer at STFC Rutherford Appleton Laboratory in Harwell Campus, Oxford. Since Dec. 2015 he is holding a Research Associate position with APT group, School of Computer Science, the University of Manchester U.K. His research interests are in the field of analogue and mixed-mode CMOS IC design for high-performance and energy-efficient processing and computation.
As post-doctoral researcher at EPFL, I also had the opportunity to co-supervise several bright PhD and MSc students which have followed a successful career. Take a look at what they have to say for our collaboration: Dr Hu Xu (Senior ASIC Design Eng, nVIDIA, USA), Mr Xifan Tang (PhD student, LSI, EPFL), and Mr Dimitris Anagnostos (PhD student, NTUA).