Glossary

This document attempts to gather terminology from various parts of the Jamaica project and present it as one quick reference. When adding terms please put them into an appropriate terminology category and make sure the list remains alphabetically sorted. Some terms are awaiting definitions, and the definitions are constantly being improved. The document is formatted in eXtensible HTML with MathML presentation markup.

Section:

General Terminology
Maths Terminology
High-level Compiler Terminology
Low-level Compiler Terminology
Graph Terminology
Jikes Terminology

General Terminology

Name/Acronym	Acronym's meaning	Description	Reference
CMP	Chip Multi-Processor	A silicon chip with more than one CPU core on it.
ISA	Instruction Set Architecture
Jamaica Architecture		A chip multiprocessor architecture designed and being researched by the Jamaica project.	Greg Wright's PhD Thesis.
javab
javar		A prototype Java restructuring compiler - add parallelism to a Java source program producing another Java source program
JavaSpMT	Java Speculative Multi-Threaded	A speculative thread pipelining parallelization model for Java programs.
JaVM	Jamaica VM.	See JIKES terminology.
jtrans		A Java bytecode to jamaica assembler translator used to compile various of the standard JDK 1.3 classes and other Java classes for linking into Greg and Ahmed's Java test harness (the JTRANS build tree)
JVM	Java Virtual Machine	An architecture independent (not optimized to a particular host machine architecture) virtual machine.	JVM Specification.
Latency		The time between initiating an event and getting a response.
MIMD	Multiple Instruction/Multiple Data	MIMD (mim-dee) computer, typically comprising a set of processors, each of which can execute its own instruction stream.	High performance compilers for parallel computers page 19 (see SIMD).
Performance		Performance is a human perception of how well a system runs. It comprises the total time to execute a program/perform an activity, the latencies involved in performing an activity, the amount of resources used to perform an activity (e.g. memory/power usage).
SIMD	Single Instruction/Multiple Data	A SIMD (sim-dee) machine (functional unit) has a single controller, or front-end, that issues instructions, and an ensemble of back-end processor (functional unit) elements that all execute each instruction in lock-step parallelism.	High performance compilers for parallel computers page 16 defines the term from the definition in Some computer organizations and their effectiveness by Michael J. Flynn.
SPDD	Single Program/Distributed Data	SPDD (speedy); a way to program MIMD computer systems so that each processor executes a copy of the same program, but on different data sets.	High performance compilers for parallel computers page 20.
SPMD	Single Program/Multiple Data	SPMD (); a way to program MIMD computer systems so that each processor executes a copy of the same program, but on different data sets.	High performance compilers for parallel computers page 20 defines the term from the definition in A Single-Program-Multiple-Data Computation Model for EPEX/Fortran by F. Darema, D. A. George, V. A. Norton, and G. F. Pfister.
SUIF	Stanford University Intermediate Format	SUIF: a kernel and compiler infrastructure for Research on Parallelizing and Optimizing Compilers,often referred to in papers discussing the Stanford Hydra CMP, Thread Level Speculation.
stride		a stride s - means that successive accesses to an array within a loop are s elements apart.
THB	Thread Branch	Jamaica instruction to fork off a thread on another CPU. Differs from THJ only in the available range of offsets.
THJ	Thread Jump	See THB.
THW	Thread Wait	Jamaica instruction.
Vault	VLSI Architecture Using Lightweight Threads	The predecessor to the Jamaica architecture.	Workshop on Hardware Support for Objects for Java 1999 paper describing the ISA.

Maths Terminology

Name/Acronym	Acronym's meaning	Description	Reference
Affine function		Affine is an adjective added to functions to infer that they are linear but shifted by a constant. For example, $y = 2 x + C$ is an affine function. Affine functions are popular when describing array accesses, as often the array index can be defined as an affine function.
$det (\begin{matrix} a_{11} & a_{12} \\ a_{21} & a_{22} \end{matrix})$ , $det (A)$ , $\| A \|$	Determinant	A value calculated for a square matrix that has properties such as: If a square matrix has a nonzero determinant, it is nonsingular and has an inverse. For any square matrices $A$ and $B$ , $det (A \times B) = det (A) \cdot det (B)$ The determinant of the identity matrix is 1. If $A^{-1}$ exists, then $det (A) \neq 0$ and $det (A^{-1}) = \frac{1}{det (A)}$ The determinant of a diagonal matrix is the product of the diagonals. The determinant of an upper or lower triangular matrix is the product of the diagonals. The determinant of the three elementary row operation transformation matrices are $T_{1} = α$ , $T_{2} = 1$ and $T_{3} = -1$ . The determinant can be calculated by expansion of cofactors using either equation below: $det (A) = Σ_{i=1}^{n} a_{i j} {(-1)}^{i + j} det (A^{[i j]})$ $det (A) = Σ_{j=1}^{n} a_{i j} {(-1)}^{i + j} det (A^{[i j]})$ The cofactor of $a_{i j}$ is ${(-1)}^{i + j} det (A^{[i j]})$ , that is the the element of matrix $A$ at location $i j$ ( $a_{ij}$ ) is multiplied by either +1 or -1 and the determinant of the minor matrix made by deleting the ith row and jth column of A. When i or j isn't bound in the equations above its value is arbitrary in the range of 1 to n.The determinant of a 2×2 matrix is: $det (\begin{matrix} a_{11} & a_{12} \\ a_{21} & a_{22} \end{matrix}) = a_{11} a_{22} + a_{12} a_{21}$	High performance compilers for parallel computers page 92, Wikipedia: Linear Algebra.
Diagonal Matrix		In linear algebra, a diagonal matrix is a square matrix in which only the entries in the main diagonal are non-zero. e.g. $(\begin{matrix} 1 & 0 \\ 0 & 4 \end{matrix})$	Wikipedia: Diagonal Matrix
$λ$	Eigenvalue	Eigenvalues are a special set of scalars associated with a linear system of equations (i.e., a matrix equation) that are sometimes also known as characteristic roots, proper values, or latent roots. For a matrix $A$ the eigenvalue is related to an eigenvector $X \in ℝ^{n} \neq 0$ such that $A X = λ X$	http://mathworld.wolfram.com/Eigenvalue.html
	Eigenvector	Eigenvectors are a special set of vectors associated with a linear system of equations (i.e., a matrix equation) that are sometimes also known as characteristic vectors, proper vectors, or latent vectors	http://mathworld.wolfram.com/Eigenvector.html
HNF	Hermite Normal Form	A lower trapezoidal integer matrix with full row rank and all positive elements, with the diagonal element having the largest magnitude in any row, obtained from a rectangular matrix by a sequence of unimodular column operations.	High performance compilers for parallel computers page 97
I	Identity Matrix	In linear algebra, the identity matrix is a matrix which is the identity element under matrix multiplication. That is, multiplication of any matrix by the identity matrix (where defined) has no effect. e.g. $[\begin{matrix} 1 & 0 \\ 0 & 1 \end{matrix}]$	Wikipedia: Identity Matrix
$A^{-1}$	Inverse Matrix	An n-by-n matrix $A$ is called invertible or non-singular if there exists another n-by-n matrix $B$ such that $A B = B A = I_{n}$ where $I_{n}$ denotes the n-by-n identity matrix and the multiplication used is ordinary matrix multiplication.	Wikipedia: Invertible Matrix
Linear Algebra		Linear Algebra the branch of mathematics concerned with the study of vectors, vector spaces, linear transformations, and systems of linear equations.	Wikipedia: Linear Algebra
Linear Independence		A set of elements of a vector space is called linearly independent if none of the vectors in the set can be written as a linear combination of finitely many other vectors in the set.	Wikipedia: Linear Independence
Minor Matrix		A minor matrix is derived from a matrix A by removing some rows and columns. Usually both A and the minor matrix are square, and usually only one row and one column are removed from A at a time.
Null Vector		A null vector of a matrix A is a non-zero vector x with the property that $A x = 0$ Facts about a null vector: A nonzero multiple of a null vector is also a null vector; The sum of two null vectors is a null vector; The set of all null vectors of a matrix forms the null space of the matrix; If x solves $A x = b$ , and y is a null vector of A, then $x + y$ is another solution, that is, $A (x + y) = b$ ; A square matrix A is singular if and only if it has a null vector; For a square matrix A, a null vector is an eigenvector for the eigenvalue 0.
$rk (A)$	Rank	The rank of a matrix A with entries in some field is defined to be the maximal number of columns of A which are linearly independent.	Wikipedia: Rank of a Matrix
$sgn (x)$	Sign	$sgn (x) = 1 /; x \in ℝ \land x > 0$ $sgn (x) = - 1 /; x \in ℝ \land x < 0$ $sgn (0) = 0$ $sgn (z) = \frac{z}{\| z \|} /; z \neq 0$
Singular Matrix		A singular matrix is a square matrix that does not have an inverse. Facts about a singular matrix A: A has a null vector. A has a zero eigenvalue. The determinant of A is zero. There is at least one nonzero vector b for which the linear system $A x = b$ has no solution x. The singular linear system $A x = 0$ has a nonzero solution x.
Square Matrix		A square matrix is one which has the same number of rows and columns. Most cases (but not all!) requiring the solution of a linear system involve a square coefficient matrix. Only a square matrix has a determinant, an inverse (if not singular!) a trace, powers, and eigenvalues. If a matrix is not square, it is called rectangular.
Unimodular Matrix		A matrix that is square, has all integer elements and its determinant is ± 1.

Compiler High-Level Terminology

Name	Description	Reference
Adaptive Optimization	Compilation time varies depending on the number of optimizations performed and the amount of code compiled/optimized. In systems that compile a program while it's running, adapting the amount of code compiled and at what optimization level can improve the performance of the program.
Bernstein conditions	iteration I₁ does not write into a location that is read by iteration I₂ iteration I₂ does not write into a location that is read by iteration I₁ iteration I₁ does not write into a location that is also written into by iteration I₂	See Optimizing Compilers for Modern Architectures
Code Hoisting	Moving invariant code out of a loop body.
Countable Loop	A loop whose stride, lower and upper bounds are known before entering the loop.	High performance compilers for parallel computers page 201.
Dynamic Compilation	Compilation of code at runtime to extend the code base of the running program.
Fully Parallel Loop	A loop whose iterations are independent of each other i.e. posses no loop carried dependencies.	See Run-Time Parallelization: It's Time Has Come
Liveness Analysis	Analyzing whether a variable is of continuing or current interest.
Loop Blocking	See loop tiling.
Loop Distribution	A program transformation that converts a single loop into multiple loops, each of which iterates over a subset of statements in the original loop.	See Automatic selection of high-order transformations in the IBM XL FORTRAN compilers.
Loop Fission	Splitting a loop into two or more separate loops.	High performance compilers for parallel computers.
Loop Fusion	The combining of two loops into one.	High performance compilers for parallel computers.
Loop Interchange	The swapping of an outer loop for an inner loop to improve memory access behavior.	High performance compilers for parallel computers.
Loop Peeling	Reducing the trip count of the loop by executing the first or last iteration outside the loop.	High performance compilers for parallel computers.
Loop Reordering	A compiler transformation that switches an outer loop and an inner loop.	High performance compilers for parallel computers.
Loop Reversal	Reversing the way a loop indexes a matrix potentially improving instruction selection and loop fusion optimizations	High performance compilers for parallel computers.
Loop Scalarization	The field of a structure or array that is repeatedly accessed may be copied to a local variable, accessed, modified and, if needs be, copied back to memory. Putting this element into a local variable allows the compiler to assign it to a register.
Loop Strip-Mining	A compiler transformation that converts a loop into two loops: an outer loop to step between strips of iterations, and an inner loop to iterate over iterations within a strip.	High performance compilers for parallel computers.
Loop Tiling	Altering the access pattern taken by a loop over a matrix so that the matrix is considered in pieces. This alters the dependency between the CPU on memory so that cache or parallel behavior may be improved.	High performance compilers for parallel computers.
Loop Unpeeling
Loop Unrolling	The replication of a loop body within a loop to increase the scope of optimization within the loop, ideally eliminating tests and branches.
Partially Parallel Loop	A loop that requires synchronization to execute in parallel.	See Run-Time Parallelization: It's Time Has Come
SAXPY	Scalar A times a vector X plus a vector Y. The inner loop of a matrix multiplication often provided by a linear algebra package (sometimes called DAXPY if it's double precision).	High performance compilers for parallel computers.
Speculative Optimization	Speculative compilation/optimization attempts to produce more optimal code (optimal in the sense that performance will be improved) by speculating as to the values used in the code. For example, virtual method calls can be optimized out of singleton classes, this can be unsafe in Java if a later loading of a class alters the class hierarchy.
Super-Vector Performance	Performance that is better than ordinary vector performance, achieved through managing locality in vector registers.	High performance compilers for parallel computers page 12.

Compiler Low-Level Terminology

Name/Acronym	Acronym's meaning	Description	Reference
Address-Based Data Dependencey		Data dependencies between two references of the same address regardless to whether there's an intervening use/defintion. Compare to Value-Based Data Dependency.
Anti dependence		When a following statement/operation sets a value which was used in the former statement/operation. See also anti dependence,flow dependence, output dependence.	See Advanced Compiler Design & Implementation page 268.
Back Edge		A CFG edge for which the target dominates the source.
Basic Block		A sequence of statements with no branches into or out of the list; a straight-line section of code.
BURS	Bottom-Up Rewrite System	An instruction selection technique.	See Engineering a Simple, Efficient Code-Generator Generator.
CFG	Control Flow Graph	A CFG has basic blocks as nodes, and possible control transfers as edges.
CSE	Common Sub-expression Elimination
Control Dependence		Execution of a statement in one path under an if test is contingent on the if test taking that path. Thus, the statement under control of the if is control dependent upon the if test. A node Y is control dependent on X in a PDG G iff there exists a directed path P from X to Y with any Z in P (excluding X and Y) post-dominated by Y, and X is not post-dominated by Y. See also data dependence and value dependence.	See Program Dependence Graph and Its Use in Optimization
Critical Edge		Where (a,b) is an edge in the cfg where node a has more than one out-going edge and node b has more than one in-coming edge.
Data Dependence		The value of an expression is dependent upon the values of the variables used in the expression. Therefore, a statement which uses a variable in an expression is data dependent upon the statement which computes the value of the variable. See also control dependence, anti dependence,flow dependence, input dependence, output dependence.
Data-flow Equation		An Equation of the form: out[S] = gen[S] ∪ (in[S] - kill[S]) that can be read as "the information at the end of a statement is either generated within the statement, or enters at the beginning and is not killed as control flows through the statement."	See Compilers: Principles, Techniques and Tools page 608.
Data-flow Tree
DFG	Data-Flow Graph
Def-use Chains
Dependence Distance		Several definitions of dependence distance can be found in the literature. A single coherent definition is the vector distance between the iteration vectors of two iterations involved in a dependence relation. Different ways to associate iteration vectors with iterations can give different dependence distances to the same program, and have different advantages.	See The definition of dependence distance and High performance compilers for parallel computers page 141.
Depth-first Ordering		The ordering resulting from a depth-first search over a CFG.	See Compilers: Principles, Techniques and Tools page 660.
DAG	Directed Acyclic Graph	A graph without cycles used for representing expressions. Also used to represent some CFGs when performing optimizations
Do-All Loop		A parallel loop construct. In a do-all loop the iterations may be scheduled on the processors in any order. Statements within the loop don't interact between iterations. See fully parallel loop.	See High-Performance Compilers for Parallel Computing page 42, and Optimizing Supercompilers for Supercomputers page 73.
Do-Across Loop		A parallel loop construct where dependencies exist between different iterations of the loop. In High-Performance Compilers for Parallel Computing, Wolfe states that code with these dependencies is in fact sequential and he stops using the construct.	See Optimizing Supercompilers for Supercomputers page 74, and High-Performance Compilers for Parallel Computing page 43.
Do-Par Loop		As a do-all loop except statements may interact between iterations. The values that overwrite elements of the array aren't available until after the do-par loop.	See High-Performance Compilers for Parallel Computing page 41.
Do-Single Loop		As a do-par loop except the overwriting values (from previous or subsequent statements) are used in the loop.
Do-While Loop		A loop of the form: `L1: <loop body> if i < N then goto L1`
FCDG	Forward Control Dependency Graph	A compiler intermediate representation.
FCFG	Factored CFG	The critical difference between a FCFG and a CFG is in the definition of basic blocks. In the FCFG, a PEI does not necessarily end its basic block. Therefore, although instructions within a FCFG basic block have the expected dominance relationships, they do not have the same post-dominance relationships as they would under the traditional basic block formulation used in a CFG.	See Efficient and Precise Modeling of Exceptions for the Analysis of Java Programs.
Flow Dependence		When a statement/operation depends on the result of a former statement/operation.	See Advanced Compiler Design & Implementation page 268.
Flow Graph		See CFG, this is the term used by ASU.	See Compilers: Principles, Techniques and Tools page 528.
Forall Loop		A loop defined such that each statement in the loop is executed as an array assignment (all right-hand side values are generated and then all stored in one go to the LHS) for all iterations before the next statement is executed.	High performance compilers for parallel computers page 41 & 534.
FUD Chains	Factored Use Def Chains
FRUD Chains
Index Variable Iteration Vector		A index variable iteration vector uses the values of the loop index variables as the iteration vector. Each iteration is assigned the vector: $i^{iv} = (\begin{matrix} I_{1} \\ I_{2} \\ ... \\ I_{n} \end{matrix})$ where $I_{k}$ is the value of the loop index variable for the kth nested loop at that iteration. See also normalized iteration vector, seminormalized iteration vector.	High performance compilers for parallel computers page 141.
Induction Variable		A scalar variable assigned in a loop whose value is a function of its value on the previous iteration; the value of a linear induction variable on the next iteration is equal to the value on this iteration plus a constant.	High performance compilers for parallel computers page 192.
Input Dependence		A data dependency from a use to a reuse of the same variable or array element. See also anti dependence, flow dependence, output dependence.
Input Dependence		A data dependency from a use to a reuse of the same variable or array element. See also anti dependence, flow dependence, output dependence.
Intervals		Regions of a CFG defined by: n is in I(n) If all the predecessors of some node m (where m ≠ n₀ - the initial node) are in I(n), then m is in I(n). Nothing else is in I(n).	See Compilers: Principles, Techniques and Tools page 664.
Irreducible Region		See reducible flow graph.
Iteration Space		A concept associated with the loop is the iteration space, which contains one point for each iteration of the loop. Also defined as: the subset of the lattice of integers that correspond to the iterations of a nested loop.	High performance compilers for parallel computers page 141.
Iteration Space Dependence Graph		Dependencies within an iteration space between different loop iterations form edges within a iteration space dependence graph. Edges are directed from earlier iterations to later ones.	High performance compilers for parallel computers page 141.
Iteration Vector		A vector of integers that corresponds to an iteration of a nested loop. See also index variable iteration vector, normalized iteration vector, seminormalized iteration vector.	High performance compilers for parallel computers page 141 & 147.
Lexically Backward		A dependence relation is lexically backward if it depends on a loop back edge (i.e. isn't lexically forward).	High performance compilers for parallel computers page 140.
Lexically Forward		We say that a dependence relation is lexically forward when the source precedes the target lexically; that is, when the source comes before the target without passing through a loop back edge.	High performance compilers for parallel computers page 140.
Loop Carried Depedence		A data dependence relation between two statement instances in two different iterations of a loop is called loop carried, because the dependence relation is carried by the loop from one iteration to another.	High performance compilers for parallel computers page 140 and 145.
Loop Independent		A data dependence relation between two statement instances in the same iteration of a loop is called loop independent, because it does not need the loop to carry the dependence.	High performance compilers for parallel computers page140 and 146.
LCFG	Loop-level Control Flow Graph		See Automatic selection of high-order transformations in the IBM XL FORTRAN compilers.
LDG	Loop-level Dependence Graph		See Automatic selection of high-order transformations in the IBM XL FORTRAN compilers.
Loop Header		The first block within a loop that is entered. It needn't perform a branch or more sophisticated method of control flow.
Loop Preheader		A basic block, executed once, immediately before the loop header.
LSG	Loop Structure Graph		See Automatic selection of high-order transformations in the IBM XL FORTRAN compilers.
LST	Loop Structure Tree		See Automatic selection of high-order transformations in the IBM XL FORTRAN compilers.
Natural Loop		The natural loop of a back edge n->h, where h dominates n, is the set of nodes x such that h dominates x and there is a path from x to n not containing h. The header
Node		See basic block.
Normalized Iteration Vector		An iteration vector assignment where the first iteration of each loop has index zero and each subsequent iteration has index one greater. See also index variable iteration vector, seminormalized iteration vector.	High performance compilers for parallel computers page 142.
Output Dependence		If two statements set the same variable then there exists an output dependence between them. See also anti dependence, flow dependence, input dependence.
PDG	Program Dependence Graph	A compiler IR with explicit control dependence and data dependence. Dependence is represented between individual statements, unlike the the VDG where dependence is between the operations within the statement.	See Program Dependence Graph and Its Use in Optimization
PEI	Potentially Excepting Instruction
Post Dominance		A node V is post-dominated by a node W in G (a PDG) if every direct path from V to STOP (not including V) contains W.	See Program Dependence Graph and Its Use in Optimization
Reducible Flow Graph		A reducible flow graph has no jumps into the middle of loops from outside; the only entry to a loop is through its header.	See Compilers: Principles, Techniques and Tools page 606.
Region		A set of nodes N in a CFG that includes a header, which dominates all the other nodes in a a region. All edges between nodes in N are in the region, except (possibly) for some of those that enter the header.	See Compilers: Principles, Techniques and Tools page 669.
Repeat-Until Loop		See Do-While loop.
SSA	Static Single Assignment	An intermediate representation that lists assignments to variables. Control-of-flow is represented by the assignment of a φ-node (phi-node) which selects an expression to assign.
SSI	Static Single Information	An extension of SSA where as well as φ-nodes there are σ-nodes (sigma-nodes). A σ-node takes a single variable and gives all possible successor versions of it. At a branch point there will be a value for each basic block that is reached.
SSU	Static Single Use	The dual of SSA form where uses have unique names. As there are many more uses than definitions, memory operations are focussed upon in preference to register. The Λ-node (Lambda-node) is the dual of the φ-node.
Structured Program		A program built of blocks, loops and conditionals each of which is single entry and single exit.	See Program Dependence Graph and Its Use in Optimization
True Dependence		See flow dependence.
Unimodular Matrix		A matrix that is square, has all integer elements and its determinant is ± 1.
VDG	Value Dependence Graph	A compiler IR with explicit control dependence and data dependence. A VDG captures information on how operations in a program depend on values computed by other operations. Unlike a PDG, which captures the dependence between statements.	See Value Dependence Graphs: Representation without Taxation
Value-Based Data Dependency		As with address-based data dependency except when a reference is defined, future uses of that reference will be dependent on that definition and not all former definitions as well.

Graph Terminology

Name/Acronym	Acronym's meaning	Description	Reference
Cycle		A cycle in the graph is a SCR that is, a set of nodes S such that such that there is a path S₁ →^* S₂ for any two nodes S₁, S₂ ∃ S.
Dom	Dominance	A node dominates itself, a node is also dominated by the intersection of the sets of dominators of its predecessors. e.g. where N is a set of nodes and D(n) is the set of dominators to a particular node: N = {a,b,c} , edges={(a,b),(b,c)} ⇒ D(a)={a}, D(b)={a,b}, D(c)={a,b,c} and: N = {a,b,c,d} , edges={(a,b),(a,c),(b,d),(c,d)} ⇒ D(a)={a}, D(b)={a,b}, D(c)={a,c}, D(d)={a,d} In otherwise a node in a CFG is dominated by all nodes in that CFG that must have been executed to reach it. The dominator relationship dom between 2 nodes is reflexive (a dom a), transitive (a dom b ∧ b dom c ⇒ a dom c), and antisymmetric (a dom b ∧ b dom a ⇒ a=b) See also: idom, sdom	See Compilers: Principles, Techniques and Tools page 670, and Advanced Compiler Design & Implementation page 181
Edge		A connection between 2 nodes on a graph.
Idom	Immediate Dominance	A node a immediately dominates another node b in a CFG, iff a dom b and there doesn't exist a different node c such that a dom c ∧ b dom c See also: dom, sdom	See Advanced Compiler Design & Implementation page 182
SCC	Strongly Connect Component	See SCR.
SCR	Strongly Connected Region	A subgraph of a directed graph where there is a path from every node to every other node (implicitly this is a loop). The SCR is maximal if every SCR containing it is the component itself (in other words, outer loops are maximal).	See Advanced Compiler Design & Implementation page 194
SF	Spanning Forest	In a general directed graph, a set of disjoint trees that contains all the nodes in the graph. The set of nodes with no edges is a degenerate spanning forest.	High performance compilers for parallel computers page 59.
ST	Spanning Tree	A tree, rooted at Entry, that contains all the nodes in a CFG.	High performance compilers for parallel computers page 56.
Sdom	Strict dominance	A node a strictly dominates b if a dom b and a ≠ b. See also: dom, idom	See Advanced Compiler Design & Implementation page 182

Jikes Terminology

Name/Acronym	Acronym's Meaning	Description
Boot Record
FP	Frame Pointer	Frame pointer - an RVM VP register identifying the current stack frame base. The contents of FP is the previous frame base. n.b. may be mapped onto a real register in which case FP (REG_FP in jamaica) names the mapped register
GC	Garbage Collection
IP	Instruction Pointer	Used variously for both Java and C function addresses. IP is used specifically as a suffix in boot record int field names to indicate that they hold the address of a kernel callback in the Kernel Services API. The function implementing the kernel callback has the same name without the IP suffix. trivia point:The RVM/Kernel header InterfaceDeclarations.h generated by the build depends upon this naming convention being strictly adhered to, failing which the link address will not be installed.
Jalapeño		A JVM written in Java by IBM. Went on to become JIKES RVM.
JaVM		The Jamaica port of the JIKES RVM.
Jikes		A compiler for the Java language to Java bytecode.
Jikes RVM	The Jikes Research Virtual Machine	An open source JVM developed largely by IBM.
JTOC	Jalapeño Table of Contents	Resides in a fixed register, holds references to global data structures, literals, numeric constants, TIBs.
Kernel Services		An API implemented by the RVM booter program which gives the RVM an interface to the underlying operating system/hardware. Calls to this API are made from the RVM using the various VM.sysCallXXX methods. trivia point:Such calls are 'magically' compiled into indirect calls using function addresses installed in the boot record by the booter program during RVM bootstrap i.e. the linkage between the RVM and the booter is hand-rolled and limited to this API.
NDVP	Native Daemon Processor
NVP	Native Virtual Processor	See VP.
PC	Program Counter
PR	Processor Register	An RVM VP register which identifies the current processor by address n.b. mapped onto a real register named PR (ESI in IA32, X4 in jamaica) trivia point: in the IA32 architecture pthreads are associated 1-1 with processors which means ESI can be written at pthread start and only needs saving when calling native (C) code . . . but . . . occasionally, in the Native API processors are reassociated with a new pthread and this involves rewriting ESI and the pthread id in the VP a-and synchronizing over the changes when the previous pthread exits from its native call . . . it's horribly nasty and the cause of most of the complexity in the IA32 kernel API!
SP	Stack Pointer	An RVM VP register holding the pointer to the top (lowest address) entry in the stack n.b. mapped to a real register named SP (ESP in IA32, O7 in jamaica)
TI	Thread Index	An RVM VP register identifying the current thread for the processor by its index in the threads array n.b. may be mapped onto a real register in which case TI names the mapped register
TIB	Type Information Block	An array, the first element of which points to an object that describes the object's class. The other elements point to compiled methods. A TIB is in effect a Virtual Method Table.
TOC	Table Of Contents	Often paraded injudiciously as an equivalent to its more orthodox alter ego JTOC trivia point:orthodoxy is my doxy, heterodoxy is your doxy
VP	Virtual Machine Processor	A VP has various virtual machine threads executing on it. A VP is implemented in Linux and AIX on a pthread. The current VP is identified by PR

References

Optimizing Compilers for Modern Architectures: By Randy Allen & Ken Kennedy
The Java^TM Virtual Machine Specification: By Tim Lindholm, Frank Yellin, 1999. The definition of the Java Virtual Machine (JVM).
A single-chip multiprocessor architecture with hardware thread support: By Greg Wright, 2001. PhD Thesis

Maintained by Ian Rogers

Last modified: